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If no processor module is loaded, this function will return nullptr )r get_idp_namer$r#rrFrFs  ""r#c V^8dQhRRRR/#)rXrfrmrYrur$)rZs"rr[r[s1111r#c.\P!V4#)ztSet target assembler. :param asmnum: number of assembler in the current processor module :returns: success)rset_target_assemblerrjs&rrIrIs  ( ( 00r#cV^8dQhRR/#rbr$)rZs"rr[r[Ns))4)r#c*\P!V!#)z9the kernel will use this function to generate idb_events )r gen_idb_eventr:s*rrLrLNs  ! !4 ((r#c]tRtRt$]!RRRR7t]tRRlt]!] P] P4t R] R &]!] P] P4tR] R &] P"tR tR #) num_range_tiic 6VPP4#r.rCrDs&rrFnum_range_t.jrHr#c 8VPPV4#r.rCrJs&&rrFrPjrLr#rMrNc V^8dQhRRRR/#)rX_min'int64'_maxr$)rZs"rr[num_range_t.__annotate__nsWGr#c ^\P!V\P!VV44R#r.)rnum_range_t_swiginitnew_num_range_t)rrSrUs&&&rrUnum_range_t.__init__ns$%%dH,D,DT - r#rTminvalmaxvalr$N)rrr8r9rrrr rUrnum_range_t_minval_getnum_range_t_minval_setr[rnum_range_t_maxval_getnum_range_t_maxval_setr\delete_num_range_trr<r$r#rrNrNiso-/I !#GHx>> FG x>> FG 22r#rNc]tRtRt$]!RRRR7t]tRRlt]!] P] P4t R] R &]!] P] P4tR] R &] P"tR tR #) params_ti{c 6VPP4#r.rCrDs&rrFparams_t.|rHr#c 8VPPV4#r.rCrJs&&rrFre|rLr#rMrNc V^8dQhRRRR/#)rX_p1rT_p2r$)rZs"rr[params_t.__annotate__sJJGJ'Jr#c \\P!V\P!W44R#r.)rparams_t_swiginit new_params_t)rrhris&&&rrUparams_t.__init__s""4)>)>s)HIr#rTp1p2r$N)rrr8r9rrrr rUrparams_t_p1_getparams_t_p1_setrorparams_t_p2_getparams_t_p2_setrpdelete_params_trr<r$r#rrcrc{sf-/I !#GHJ833X5M5MNBN833X5M5MNBN//r#rcc ,V^8dQhRRRRRRRRR R /#) rXoptsz'cfgopt_t const []'noptsrmcbz'config_changed_cb_t *'objrrYrur$)rZs"rr[r[s3;;.;s;;'/;8<;r#c0\P!WW#4#r.)rregister_cfgopts)rwrxryrzs&&&&rr|r|s  $ $T" ::r#c V^8dQhRRRR/#)rXkeyrKrYz 'jvalue_t *'r$)rZs"rr[r[s**#**r#c.\P!V4#r.)rget_config_value)r~s&rrrs  $ $S ))r#c$V^8dQhRRRRRR/#)rXcompidrnrrKrYr$)rZs"rr[r[s!22H2C232r#c.\P!W4#r.)rcfg_get_cc_parm)rrs&&rrrs  # #F 11r#c V^8dQhRRRR/#rXrrnrYrKr$)rZs"rr[r[s3383s3r#c.\P!V4#r.)rcfg_get_cc_header_pathrs&rrrs  * *6 22r#c V^8dQhRRRR/#rr$)rZs"rr[r[s999S9r#c.\P!V4#r.)rcfg_get_cc_predefined_macrosrs&rrrs  0 0 88r#c$V^8dQhRRRRRR/#)rX directiverKpriorityrmrYrcr$)rZs"rr[r[s&BBBsBBr#c.\P!W4#r.)rprocess_config_directive)rrs&&rrrs  , ,Y AAr#c2\P!WW#V4#)a;Assemble an instruction to a string (display a warning if an error is found) :param ea: linear address of instruction :param cs: cs of instruction :param ip: ip of instruction :param use32: is 32bit segment :param line: line to assemble :returns: a string containing the assembled instruction, or None on failure)r AssembleLinerrrrrs&&&&&rrrs  D 99r#c2\P!WW#V4#)aAssemble an instruction into the database (display a warning if an error is found) :param ea: linear address of instruction :param cs: cs of instruction :param ip: ip of instruction :param use32: is 32bit segment? :param line: line to assemble :returns: Boolean. True on success.)rrrs&&&&&rrrs   RR 55r#c,\P!4#)zReturns the 'ph.id' field)r ph_get_idr$r#rrrs    r#c,\P!4#)zReturns the 'ph.version')rph_get_versionr$r#rrrs  " " $$r#c,\P!4#)zReturns the 'ph.flag')r ph_get_flagr$r#rrrs    !!r#c,\P!4#)zReturns the 'ph.cnbits')r ph_get_cnbitsr$r#rrr  ! ! ##r#c,\P!4#)zReturns the 'ph.dnbits')r ph_get_dnbitsr$r#rrrrr#c,\P!4#)zReturns the 'ph.reg_first_sreg')rph_get_reg_first_sregr$r#rrrs  ) ) ++r#c,\P!4#)zReturns the 'ph.reg_last_sreg')rph_get_reg_last_sregr$r#rrr  ( ( **r#c,\P!4#)zReturns the 'ph.segreg_size')rph_get_segreg_sizer$r#rrr  & & ((r#c,\P!4#)zReturns the 'ph.reg_code_sreg')rph_get_reg_code_sregr$r#rrrrr#c,\P!4#)zReturns the 'ph.reg_data_sreg')rph_get_reg_data_sregr$r#rrrrr#c,\P!4#)zReturns the 'ph.icode_return')rph_get_icode_returnr$r#rrrs  ' ' ))r#c,\P!4#)zReturns the 'ph.instruc_start')rph_get_instruc_startr$r#rrrrr#c,\P!4#)zReturns the 'ph.instruc_end')rph_get_instruc_endr$r#rrrrr#c,\P!4#)zCReturns the 'ph.tbyte_size' field as defined in he processor module)rph_get_tbyte_sizer$r#rrr s  % % ''r#c,\P!4#)zReturns a list of tuples (instruction_name, instruction_feature) containing the instructions list as defined in he processor module)rph_get_instrucr$r#rrr s  " " $$r#c,\P!4#)zEReturns the list of register names as defined in the processor module)rph_get_regnamesr$r#rrr s  # # %%r#c$V^8dQhRRRRRR/#)rXrrrrmrYz7Union[Tuple[int, ida_idaapi.ea_t, int, int, int], None]r$)rZs"rr[r[ s$ / /O / /8+ /r#c.\P!W4#)aReturns the operand information given an ea and operand number. :param ea: address :param n: operand number :returns: Returns an idd_opinfo_t as a tuple: (modified, ea, reg_ival, regidx, value_size). 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"r#cV^8dQhRR/#rtr$)rZs"rr[r> --T-r#c .\P!V4#r.)rIDP_Hooks_hookrgs&rhookIDP_Hooks.hook> &&t,,r#cV^8dQhRR/#rtr$)rZs"rr[rA //t/r#c .\P!V4#r.)rIDP_Hooks_unhookrgs&runhookIDP_Hooks.unhookA ((..r#c V^8dQhRRRR/#)rXrSrKrYrmr$)rZs"rr[rD s==3=#=r#c .\P!W4#)z|The IDP module is just loaded. :param idp_modname: (const char *) processor module name :returns: <0: on failure)rIDP_Hooks_ev_init)rrSs&&rrIDP_Hooks.ev_initD s ))$<:. Can be used for setting a processor subtype. Also called if option string is passed to set_processor_type() and IDC's SetProcessorType(). :param options: (const char *) :param confidence: (int) 0: loader's suggestion 1: user's decision :returns: <0: if bad option string)rIDP_Hooks_ev_set_proc_options)rrrs&&&rrIDP_Hooks.ev_set_proc_options s 55dZ r#c V^8dQhRRRR/#)rXrrrYrur$)rZs"rr[r s99z9T9r#c .\P!W4#)aAnalyze one instruction and fill 'out' structure. This function shouldn't change the database, flags or anything else. All these actions should be performed only by emu_insn() function. insn_t::ea contains address of instruction to analyze. :param out: (insn_t *) :returns: length of the instruction in bytes, 0 if instruction can't be decoded. :returns: 0: if instruction can't be decoded.)rIDP_Hooks_ev_ana_insn)rrs&&rrIDP_Hooks.ev_ana_insn s --d88r#c V^8dQhRRRR/#)rXr1rrYrur$)rZs"rr[r s:: 0:D:r#c .\P!W4#)a5Emulate instruction, create cross-references, plan to analyze subsequent instructions, modify flags etc. Upon entrance to this function, all information about the instruction is in 'insn' structure. :param insn: (const insn_t *) :returns: 1: ok :returns: -1: the kernel will delete the instruction)rIDP_Hooks_ev_emu_insnrr1s&&rrIDP_Hooks.ev_emu_insn s --d99r#c V^8dQhRRRR/#rXoutctx 'outctx_t *'rYrmr$)rZs"rr[r >>L>C>r#c .\P!W4#)zgFunction to produce start of disassembled text :param outctx: (outctx_t *) :returns: void: )rIDP_Hooks_ev_out_headerrr&s&&rrIDP_Hooks.ev_out_header  //==r#c V^8dQhRRRR/#r%r$)rZs"rr[r r(r#c .\P!W4#)zeFunction to produce end of disassembled text :param outctx: (outctx_t *) :returns: void: )rIDP_Hooks_ev_out_footerr+s&&rrIDP_Hooks.ev_out_footer r-r#c$V^8dQhRRRRRR/#rXr&r'rrrYrmr$)rZs"rr[r s&EElEE#Er#c 0\P!WV4#)zFunction to produce start of segment :param outctx: (outctx_t *) :param seg: (segment_t *) :returns: 1: ok :returns: 0: not implemented)rIDP_Hooks_ev_out_segstartrr&rs&&&rrIDP_Hooks.ev_out_segstart s11$DDr#c$V^8dQhRRRRRR/#r3r$)rZs"rr[r s&CCLC}CCr#c 0\P!WV4#)zFunction to produce end of segment :param outctx: (outctx_t *) :param seg: (segment_t *) :returns: 1: ok :returns: 0: not implemented)rIDP_Hooks_ev_out_segendr6s&&&rrIDP_Hooks.ev_out_segend s//cBBr#c V^8dQhRRRR/#r%r$)rZs"rr[r s??\?S?r#c .\P!W4#)zFunction to produce assume directives when segment register value changes. :param outctx: (outctx_t *) :returns: 1: ok :returns: 0: not implemented)rIDP_Hooks_ev_out_assumesr+s&&rrIDP_Hooks.ev_out_assumes s 00>>r#c V^8dQhRRRR/#)rXr&r'rYrur$)rZs"rr[r s<<,<$0: ok, generated the definition text :returns: 0: not implemented)rIDP_Hooks_ev_gen_regvar_def)rr&rKs&&&rrIDP_Hooks.ev_gen_regvar_def s33D!DDr#c(V^8dQhRRRRRRRR/#)rXr&r'r rKr rmrYr$)rZs"rr[r s)LC r#c 2\P!WVV4#)aCallback: generate analog of: #line 123 :param outctx: (outctx_t *) output context :param file: (const char *) source file (may be nullptr) :param lnnum: (size_t) line number :returns: 1: directive has been generated :returns: 0: not implemented)rIDP_Hooks_ev_gen_src_file_lnnum)rr&r r s&&&&rrIDP_Hooks.ev_gen_src_file_lnnum s77d  r#c V^8dQhRRRR/#)rXrrrYrmr$)rZs"rr[r s>>M>S>r#c .\P!W4#)zA new segment is about to be created. :param seg: (segment_t *) :returns: 1: ok :returns: <0: segment should not be created)rIDP_Hooks_ev_creating_segm)rrs&&rrIDP_Hooks.ev_creating_segm s 224==r#c(V^8dQhRRRRRRRR/#)rXrrrcrrrmrYr$)rZs"rr[r# s0 G G- G_ G  G Gr#c 0\P!WW#4#)zMay the kernel move the segment? :param seg: (segment_t *) segment to move :param to: (::ea_t) new segment start address :param flags: (int) combination of Move segment flags :returns: 0: yes :returns: <0: the kernel should stop)rIDP_Hooks_ev_moving_segm)rrrcrs&&&&rrIDP_Hooks.ev_moving_segm# s00BFFr#c V^8dQhRRRR/#)rXrrrYrmr$)rZs"rr[r. s??_??r#c .\P!W4#)aQTry to define some unexplored bytes. This notification will be called if the kernel tried all possibilities and could not find anything more useful than to convert to array of bytes. The module can help the kernel and convert the bytes into something more useful. :param start_ea: (::ea_t) :returns: number of converted bytes)rIDP_Hooks_ev_coagulaterrs&&rrIDP_Hooks.ev_coagulate. s ..t>>r#c V^8dQhRRRR/#rr$)rZs"rr[r5 s88o88r#c .\P!W4#)zAn item in the database (insn or data) is being deleted. :param ea: (ea_t) :returns: 1: do not delete srranges at the item end :returns: 0: srranges can be deleted)rIDP_Hooks_ev_undefinerrs&&rrIDP_Hooks.ev_undefine5 s --d77r#c ,V^8dQhRRRRRRRRRR /#) rXr'rr(r)r*r+r,rYrmr$)rZs"rr[r= s: M M M# M2A M" M&) Mr#c 2\P!VWW44#)aAn item hinders creation of another item. :param hindering_item_ea: (::ea_t) :param new_item_flags: (flags64_t) (0 for code) :param new_item_ea: (::ea_t) :param new_item_length: (::asize_t) :returns: 0: no reaction :returns: !=0: the kernel may delete the hindering item)r!IDP_Hooks_ev_treat_hindering_item)rr'r(r*r+s&&&&&rr!IDP_Hooks.ev_treat_hindering_item= s 99$ {M Mr#c$V^8dQhRRRRRR/#)rXrrrrKrYrmr$)rZs"rr[rK s&@@O@s@c@r#c 0\P!WV4#)a]The kernel is going to rename a byte. :param ea: (::ea_t) :param new_name: (const char *) :returns: <0: if the kernel should not rename it. :returns: 2: to inhibit the notification. I.e., the kernel should not rename, but 'set_name()' should return 'true'. also see renamed the return value is ignored when kernel is going to delete name)rIDP_Hooks_ev_rename)rrrs&&&rrIDP_Hooks.ev_renameK s++Dh??r#c V^8dQhRRRR/#)rXr*rmrYr$)rZs"rr[rT s>>C>3>r#c .\P!W4#)zis indirect far jump or call instruction? meaningful only if the processor has 'near' and 'far' reference types :param icode: (int) :returns: 0: not implemented :returns: 1: yes :returns: -1: no)rIDP_Hooks_ev_is_far_jump)rr*s&&rrIDP_Hooks.ev_is_far_jumpT s00==r#c$V^8dQhRRRRRR/#)rXr1rr;rmrYr$)rZs"rr[r] s'HH$4HHsHr#c 0\P!WV4#)aIs the instruction sane for the current file type? :param insn: (const insn_t*) the instruction :param no_crefs: (int) 1: the instruction has no code refs to it. ida just tries to convert unexplored bytes to an instruction (but there is no other reason to convert them into an instruction) 0: the instruction is created because of some coderef, user request or another weighty reason. :returns: >=0: ok :returns: <0: no, the instruction isn't likely to appear in the program)rIDP_Hooks_ev_is_sane_insn)rr1r;s&&&rrIDP_Hooks.ev_is_sane_insn] s11$hGGr#c V^8dQhRRRR/#rXr1rrYrmr$)rZs"rr[rf >>$4>>r#c .\P!W4#)zIs conditional instruction? :param insn: (const insn_t *) instruction address :returns: 1: yes :returns: -1: no :returns: 0: not implemented or not instruction)rIDP_Hooks_ev_is_cond_insnr"s&&rrIDP_Hooks.ev_is_cond_insnf 11$==r#c V^8dQhRRRR/#rr$)rZs"rr[ro rr#c .\P!W4#)zIs the instruction a "call"? :param insn: (const insn_t *) instruction :returns: 0: unknown :returns: <0: no :returns: 1: yes)rIDP_Hooks_ev_is_call_insnr"s&&rrIDP_Hooks.ev_is_call_insno rr#c$V^8dQhRRRRRR/#)rXr1rrrrYrmr$)rZs"rr[rx s'DD#3DGDsDr#c 0\P!WV4#)zIs the instruction a "return"? :param insn: (const insn_t *) instruction :param flags: (uchar), combination of IRI_... flags (see above) :returns: 0: unknown :returns: <0: no :returns: 1: yes)rIDP_Hooks_ev_is_ret_insn)rr1rs&&&rrIDP_Hooks.ev_is_ret_insnx s00UCCr#c$V^8dQhRRRRRR/#)rXr1rr5rmrYr$)rZs"rr[r s'DD#3DCD3Dr#c 0\P!WV4#)zCan a function start here? :param insn: (const insn_t*) the instruction :param state: (int) autoanalysis phase 0: creating functions 1: creating chunks :returns: probability 1..100)rIDP_Hooks_ev_may_be_func)rr1r5s&&&rrIDP_Hooks.ev_may_be_func s 00UCCr#c$V^8dQhRRRRRR/#)rXr1rr?rurYrmr$)rZs"rr[r s$ # #*: ## #'* #r#c 0\P!WV4#)a Is the current instruction end of a basic block? This function should be defined for processors with delayed jump slots. :param insn: (const insn_t*) the instruction :param call_insn_stops_block: (bool) :returns: 0: unknown :returns: <0: no :returns: 1: yes)rIDP_Hooks_ev_is_basic_block_end)rr1r?s&&&rrIDP_Hooks.ev_is_basic_block_end s77 !# #r#c V^8dQhRRRR/#rr$)rZs"rr[r sBB(8BCBr#c .\P!W4#)zDetermine if instruction is an indirect jump. If CF_JUMP bit cannot describe all jump types jumps, please define this callback. :param insn: (const insn_t*) the instruction :returns: 0: use CF_JUMP :returns: 1: no :returns: 2: yes)rIDP_Hooks_ev_is_indirect_jumpr"s&&rrIDP_Hooks.ev_is_indirect_jump s55dAAr#cV^8dQhRR/#rlr$)rZs"rr[r s>>c>r#c .\P!V4#z Reserved. )rIDP_Hooks_ev_is_insn_table_jumprgs&rrIDP_Hooks.ev_is_insn_table_jump s77==r#c$V^8dQhRRRRRR/#)rXrArBr1rrYrmr$)rZs"rr[r s"???6F?#?r#c 0\P!WV4#)aFind 'switch' idiom or override processor module's decision. It will be called for instructions marked with CF_JUMP. :param si: (switch_info_t *), out :param insn: (const insn_t *) instruction possibly belonging to a switch :returns: 1: switch is found, 'si' is filled. IDA will create the switch using the filled 'si' :returns: -1: no switch found. This value forbids switch creation by the processor module :returns: 0: not implemented)rIDP_Hooks_ev_is_switch)rrAr1s&&&rr IDP_Hooks.ev_is_switch s..t>>r#c ,V^8dQhRRRRRRRRR R /#) rXrNz 'casevec_t *'rOrPrQrrArBrYrmr$)rZs"rr[r s3 " "M " "- "3B "FI "r#c 2\P!WW#V4#)arCalculate case values and targets for a custom jump table. :param casevec: (::casevec_t *) vector of case values (may be nullptr) :param targets: (eavec_t *) corresponding target addresses (my be nullptr) :param insn_ea: (::ea_t) address of the 'indirect jump' instruction :param si: (switch_info_t *) switch information :returns: 1: ok :returns: <=0: failed)rIDP_Hooks_ev_calc_switch_cases)rrNrOrQrAs&&&&&rr IDP_Hooks.ev_calc_switch_cases s66t b" "r#c$V^8dQhRRRRRR/#)rXrHrrArBrYrmr$)rZs"rr[r s(KK_KKKr#c 0\P!WV4#)zCreate xrefs for a custom jump table. :param jumpea: (::ea_t) address of the jump insn :param si: (const switch_info_t *) switch information :returns: must return 1 Must be implemented if module uses custom jump tables, SWI_CUSTOM)r IDP_Hooks_ev_create_switch_xrefs)rrHrAs&&&rr IDP_Hooks.ev_create_switch_xrefs s88rJJr#c V^8dQhRRRR/#rr$)rZs"rr[r s==?=c=r#c .\P!W4#)zIs the instruction created only for alignment purposes?. Do not directly call this function, use is_align_insn() :param ea: (ea_t) - instruction address :returns: number: of bytes in the instruction)rIDP_Hooks_ev_is_align_insnrps&&rrIDP_Hooks.ev_is_align_insn s 224<>r#c(V^8dQhRRRRRRRR/#)rXrrrrurrY 'PyObject *'r$)rZs"rr[r s/ M M_ MT M$ M  Mr#c 0\P!WW#4#)aGet delay slot instruction :param ea: (::ea_t *) in: instruction address in question, out: (if the answer is positive) if the delay slot contains valid insn: the address of the delay slot insn else: BADADDR (invalid insn, e.g. a branch) :param bexec: (bool *) execute slot if jumping, initially set to 'true' :param fexec: (bool *) execute slot if not jumping, initially set to 'true' :returns: 1: positive answer :returns: <=0: ordinary insn)rIDP_Hooks_ev_delay_slot_insnrs&&&&rrIDP_Hooks.ev_delay_slot_insn s44TuLLr#c(V^8dQhRRRRRRRR/#) rXmoder,r1rrrQrYrmr$)rZs"rr[r s1 G G7 G2B G G Gr#c 0\P!WW#4#)aCheck whether the operand is relative to stack pointer or frame pointer This event is used to determine how to output a stack variable If not implemented, then all operands are sp based by default. Implement this event only if some stack references use frame pointer instead of stack pointer. :param mode: (int *) out, combination of SP/FP operand flags :param insn: (const insn_t *) :param op: (const op_t *) :returns: 0: not implemented :returns: 1: ok)rIDP_Hooks_ev_is_sp_based)rrr1rs&&&&rrIDP_Hooks.ev_is_sp_based s00TFFr#c V^8dQhRRRR/#)rXrrQrYrmr$)rZs"rr[r s==>=S=r#c .\P!W4#)a5Can the operand have a type as offset, segment, decimal, etc? (for example, a register AX can't have a type, meaning that the user can't change its representation. see bytes.hpp for information about types and flags) :param op: (const op_t *) :returns: 0: unknown :returns: <0: no :returns: 1: yes)rIDP_Hooks_ev_can_have_type)rrs&&rrIDP_Hooks.ev_can_have_type s224<BB#Br#c 0\P!WV4#)zCompare instruction operands :param op1: (const op_t*) :param op2: (const op_t*) :returns: 1: equal :returns: -1: not equal :returns: 0: not implemented)rIDP_Hooks_ev_cmp_operands)rrArBs&&&rrIDP_Hooks.ev_cmp_operands s11$SAAr#c ,V^8dQhRRRRRRRRR R/#) rXrrrrrrmrz'fixup_data_t const *'rYr$)rZs"rr[r s9 I IK I_ I  I' I+. Ir#c 2\P!WW#V4#)aCalled from apply_fixup before converting operand to reference. Can be used for changing the reference info. (e.g. the PPC module adds REFINFO_NOBASE for some references) :param ri: (refinfo_t *) :param ea: (::ea_t) instruction address :param n: (int) operand number :param fd: (const fixup_data_t *) :returns: <0: do not create an offset :returns: 0: not implemented or refinfo adjusted)rIDP_Hooks_ev_adjust_refinfo)rrrrrs&&&&&rrIDP_Hooks.ev_adjust_refinfo s33DbRHHr#c$V^8dQhRRRRRR/#)rXr1rr rmrYrr$)rZs"rr[r s(KK*:K3K Kr#c 0\P!WV4#)aRequest text string for operand (cli, java, ...). :param insn: (const insn_t*) the instruction :param opnum: (int) operand number, -1 means any string operand :returns: 0: no string (or empty string) :returns: >0: original string length without terminating zero)rIDP_Hooks_ev_get_operand_string)rr1r s&&&rrIDP_Hooks.ev_get_operand_string s77EJJr#c(V^8dQhRRRRRRRR/#)rXrrmrrrYrr$)rZs"rr[r s.KK3KsK3K,Kr#c 0\P!WW#4#)aGenerate text representation of a register. Most processor modules do not need to implement this callback. It is useful only if processor_t::reg_names[reg] does not provide the correct register name. :param reg: (int) internal register number as defined in the processor module :param width: (size_t) register width in bytes :param reghi: (int) if not -1 then this function will return the register pair :returns: -1: if error :returns: strlen(buf): if success)rIDP_Hooks_ev_get_reg_name)rrrrs&&&&rr IDP_Hooks.ev_get_reg_name s11$UJJr#c V^8dQhRRRR/#)rXr:rKrYrmr$)rZs"rr[r s<<#<IDP_Hooks.ev_del_dref s --d2>>r#c ,V^8dQhRRRRRRRRRR /#) rXrirrcrrurrIrYrmr$)rZs"rr[r s2 ! ! !O ! !#+ !/2 !r#c 2\P!WVW44#)a(Data reference is being analyzed. plugin may correct 'code_ea' (e.g. for thumb mode refs, we clear the last bit) :param to: (::ea_t) :param may_define: (bool) :param code_ea: (::ea_t *) :returns: <0: failed dref analysis, >0 done dref analysis :returns: 0: not implemented or continue)rIDP_Hooks_ev_coagulate_dref)rrircrrs&&&&&rr@IDP_Hooks.ev_coagulate_dref s33D ! !r#c V^8dQhRRRR/#)rXrrrYrmr$)rZs"rr[r sEE?EcEr#c .\P!W4#)zThe kernel wants to display the segment registers in the messages window. :param current_ea: (::ea_t) :returns: <0: if the kernel should not show the segment registers. (assuming that the module has done it) :returns: 0: not implemented)rIDP_Hooks_ev_may_show_sreg)rrs&&rrBIDP_Hooks.ev_may_show_sreg s 224DDr#c V^8dQhRRRR/#)rXrz 'atype_t'rYrmr$)rZs"rr[r sBB BSBr#c .\P!W4#)zvOne analysis queue is empty. :param type: (atype_t) :returns: void: see also idb_event::auto_empty_finally)rIDP_Hooks_ev_auto_queue_empty)rrs&&rrFIDP_Hooks.ev_auto_queue_empty s 55dAAr#c$V^8dQhRRRRRR/#)rXrrr^rKrYrmr$)rZs"rr[r s"   #   r#c 0\P!WV4#)aFlirt has recognized a library function. This callback can be used by a plugin or proc module to intercept it and validate such a function. :param start_ea: (::ea_t) :param funcname: (const char *) :returns: -1: do not create a function, :returns: 0: function is validated)r IDP_Hooks_ev_validate_flirt_func)rrr^s&&&rrH IDP_Hooks.ev_validate_flirt_func s88  r#c(V^8dQhRRRRRRRR/#) rXrz'idasgn_t const *'rz'libfunc_t const *'rrIrYrmr$)rZs"rr[r s2 N N(: N N!) N-0 Nr#c 0\P!WW#4#)aCalled when a signature module has been matched against bytes in the database. This is used to compute the offset at which a particular module's libfunc should be applied. :param sig: (const idasgn_t *) :param libfun: (const libfunc_t *) :param ea: (::ea_t *) :returns: 1: the ea_t pointed to by the third argument was modified. :returns: <=0: not modified. use default algorithm.)rIDP_Hooks_ev_adjust_libfunc_ea)rrrrs&&&&rrJIDP_Hooks.ev_adjust_libfunc_ea s66t&MMr#c 0V^8dQhRRRRRRRRRRR R /#) rXrrrrrrurrKrYrr$)rZs"rr[r sB M Mo M? M M $ M,/ M3? Mr#c 2\P!WW#WE4#)aJAssemble an instruction. (display a warning if an error occurs). :param ea: (::ea_t) linear address of instruction :param cs: (::ea_t) cs of instruction :param ip: (::ea_t) ip of instruction :param use32: (bool) is 32-bit segment? :param line: (const char *) line to assemble :returns: size of the instruction in bytes)rIDP_Hooks_ev_assemble)rrrrrrs&&&&&&rrLIDP_Hooks.ev_assemble s--dLLr#c ,V^8dQhRRRRRRRRR R/#) rXr2rIr3rr4rKpositionrmrYr$)rZs"rr[r s3 ) ) ) )!$ )03 )7: )r#c 2\P!WW#V4#)zExtract address from a string. :param out_ea: (ea_t *), out :param screen_ea: (ea_t) :param string: (const char *) :param position: (size_t) :returns: 1: ok :returns: 0: kernel should use the standard algorithm :returns: -1: error)rIDP_Hooks_ev_extract_address)rr2r3r4r1 s&&&&&rrNIDP_Hooks.ev_extract_address s44T x) )r#c(V^8dQhRRRRRRRR/#) rXrrrrrr+rYrmr$)rZs"rr[r s(>>H>>X>>r#c 0\P!WW#4#)a Floating point -> IEEE conversion :param m: (void *) ptr to processor-specific floating point value :param e: (fpvalue_t *) IDA representation of a floating point value :param swt: (uint16) operation (see realcvt() in ieee.h) :returns: 0: not implemented)rIDP_Hooks_ev_realcvt)rrrrs&&&&rrPIDP_Hooks.ev_realcvt s,,Ta==r#c 0V^8dQhRRRRRRRRRR R R/#) rXrrurrrrrmrz'html_line_cb_t **'rYr$)rZs"rr[r s9 $ $$ $H $d $ $0 $47 $r#c 4\P!WVW4V4#)aFCallback: generating asm or lst file. The kernel calls this callback twice, at the beginning and at the end of listing generation. The processor module can intercept this event and adjust its output :param starting: (bool) beginning listing generation :param fp: (FILE *) output file :param is_asm: (bool) true:assembler, false:listing :param flags: (int) flags passed to gen_file() :param outline: (html_line_cb_t **) ptr to ptr to outline callback. if this callback is defined for this code, it will be used by the kernel to output the generated lines :returns: void: )rIDP_Hooks_ev_gen_asm_or_lst)rrrrrrs&&&&&&rrRIDP_Hooks.ev_gen_asm_or_lst s 33DB 7$ $r#c$V^8dQhRRRRRR/#)rXrr,rrrYrmr$)rZs"rr[r s&DDgD8DsDr#c 0\P!WV4#)aGenerate map file. If not implemented the kernel itself will create the map file. :param nlines: (int *) number of lines in map file (-1 means write error) :param fp: (FILE *) output file :returns: 0: not implemented :returns: 1: ok :returns: -1: write error)rIDP_Hooks_ev_gen_map_file)rrrs&&&rrTIDP_Hooks.ev_gen_map_file s11$CCr#c(V^8dQhRRRRRRRR/#)rXrrrrmrrrYr$)rZs"rr[r s+""" "!"%("r#c 0\P!WW#4#)zCreate special segment representing the flat group. :param image_base: (::ea_t) :param bitness: (int) :param dataseg_sel: (::sel_t) return value is ignored)rIDP_Hooks_ev_create_flat_group)rrrrs&&&&rrVIDP_Hooks.ev_create_flat_group s66t " "r#c$V^8dQhRRRRRR/#)rXregvalrUrVrmrYr$)rZs"rr[r! s&BB BCB3Br#c 0\P!WV4#)a IBM PC only internal request, should never be used for other purpose Get register value by internal index :param regval: (uval_t *), out :param regnum: (int) :returns: 1: ok :returns: 0: not implemented :returns: -1: failed (undefined value or bad regnum))rIDP_Hooks_ev_getreg)rrF rVs&&&rrXIDP_Hooks.ev_getreg! s++D&AAr#c V^8dQhRRRR/#rr$)rZs"rr[r+ s>>O>s>r#c .\P!W4#)zAnalyzes function prolog, epilog, and updates purge, and function attributes :param ea: (::ea_t) start of function :returns: 1: ok :returns: 0: not implemented)rIDP_Hooks_ev_analyze_prologrps&&rrZIDP_Hooks.ev_analyze_prolog+ s 33D==r#c$V^8dQhRRRRRR/#)rXrrr1rrYrmr$)rZs"rr[r3 s(GGzG9IG Gr#c 0\P!WV4#)zCalculate amount of change to sp for the given insn. This event is required to decompile code snippets. :param spdelta: (sval_t *) :param insn: (const insn_t *) :returns: 1: ok :returns: 0: not implemented)rIDP_Hooks_ev_calc_spdelta)rrr1s&&&rr\IDP_Hooks.ev_calc_spdelta3 s11$FFr#cV^8dQhRR/#rlr$)rZs"rr[r= s3333r#c .\P!V4#r)rIDP_Hooks_ev_calcrelrgs&rr^IDP_Hooks.ev_calcrel= ,,T22r#c$V^8dQhRRRRRR/#)rXpinsnrrrmrYrr$)rZs"rr[rB s(FF'7FcF Fr#c 0\P!WV4#)a?Find register value via a register tracker. The returned value in 'out' is valid before executing the instruction. :param pinsn: (const insn_t *) instruction :param reg: (int) register index :returns: 1: if implemented, and value was found :returns: 0: not implemented, -1 decoding failed, or no value found)rIDP_Hooks_ev_find_reg_value)rrX rs&&&rr`IDP_Hooks.ev_find_reg_valueB s33DEEr#c$V^8dQhRRRRRR/#)rXrX ropnrmrYrr$)rZs"rr[rL s(EE&6ESE Er#c 0\P!WV4#)a=Find operand value via a register tracker. The returned value in 'out' is valid before executing the instruction. :param pinsn: (const insn_t *) instruction :param opn: (int) operand index :returns: 1: if implemented, and value was found :returns: 0: not implemented, -1 decoding failed, or no value found)rIDP_Hooks_ev_find_op_value)rrX r] s&&&rrbIDP_Hooks.ev_find_op_valueL s224DDr#c(V^8dQhRRRRRRRR/#) rX action_namerKvecz'undo_records_t const *'is_undorurYrmr$)rZs"rr[rV s+S +/36r#c 2\P!WVV4#)aBReplaying an undo/redo buffer :param action_name: (const char *) action that we perform undo/redo for. may be nullptr for intermediate buffers. :param vec: (const undo_records_t *) :param is_undo: (bool) true if performing undo, false if performing redo This event may be generated multiple times per undo/redo)rIDP_Hooks_ev_replaying_undo)rrb rc rd s&&&&rrdIDP_Hooks.ev_replaying_undoV s33Ds  r#c$V^8dQhRRRRRR/#)rXrb rKrd rurYrmr$)rZs"rr[r` s&MM#MMMr#c 0\P!WV4#)zEnded undoing/redoing an action :param action_name: (const char *) action that we finished undoing/redoing. is not nullptr. :param is_undo: (bool) true if performing undo, false if performing redo)rIDP_Hooks_ev_ending_undo)rrb rd s&&&rrfIDP_Hooks.ev_ending_undo` s 00GLLr#c$V^8dQhRRRRRR/#)rXrrrrurYrmr$)rZs"rr[rg s&GG_GdGcGr#c 0\P!WV4#)zSome processors have ISA 16-bit mode e.g. ARM Thumb mode, PPC VLE, MIPS16 Set ISA 16-bit mode :param ea: (ea_t) address to set new ISA mode :param code16: (bool) true for 16-bit mode, false for 32-bit mode)rIDP_Hooks_ev_set_code16_mode)rrrs&&&rrhIDP_Hooks.ev_set_code16_modeg s 44TvFFr#c V^8dQhRRRR/#rr$)rZs"rr[rn rr#c .\P!W4#)zGet ISA 16-bit mode :param ea: (ea_t) address to get the ISA mode :returns: 1: 16-bit mode :returns: 0: not implemented or 32-bit mode)rIDP_Hooks_ev_get_code16_moderps&&rrjIDP_Hooks.ev_get_code16_moden rr#cV^8dQhRR/#rlr$)rZs"rr[rv s77s7r#c .\P!V4#)zGet pointer to the processor module object. All processor modules must implement this. The pointer is returned as size_t. )rIDP_Hooks_ev_get_procmodrgs&rrlIDP_Hooks.ev_get_procmodv s0066r#c V^8dQhRRRR/#rr$)rZs"rr[r{ sAAsAcAr#c .\P!W4#)zQAfter setting a new assembler :param asmnum: (int) See also ev_newasm)rIDP_Hooks_ev_asm_installedrs&&rrnIDP_Hooks.ev_asm_installed{ s224@@r#c(V^8dQhRRRRRRRR/#)rXr r r1rrrmrYr$)rZs"rr[r s,  *:  !$ (+ r#c 0\P!WW#4#)aoGet info about the registers that are used/changed by an instruction. :param accvec: (reg_accesses_t*) out: info about accessed registers :param insn: (const insn_t *) instruction in question :param flags: (int) reserved, must be 0 :returns: -1: if accvec is nullptr :returns: 1: found the requested access (and filled accvec) :returns: 0: not implemented)rIDP_Hooks_ev_get_reg_accesses)rr r1rs&&&&rrpIDP_Hooks.ev_get_reg_accesses s55dD r#c$V^8dQhRRRRRR/#)rXrr,r1rrYrmr$)rZs"rr[r s( N Ng N=M N  Nr#c 0\P!WV4#)aDetect if an instruction is a "thunk call" to a flow guard function (equivalent to call reg/return/nop) :param p_reg: (int *) indirect register number, may be -1 :param insn: (const insn_t *) call/jump instruction :returns: -1: no thunk detected :returns: 1: indirect call :returns: 2: security check routine call (NOP) :returns: 3: return thunk :returns: 0: not implemented)r"IDP_Hooks_ev_is_control_flow_guard)rrr1s&&&rrr"IDP_Hooks.ev_is_control_flow_guard s::4MMr#c V^8dQhRRRR/#)rXrzr{rYrmr$)rZs"rr[r sEE+;EsEr#c .\P!W4#)zCreate merge handlers, if needed :param md: (merge_data_t *) This event is generated immediately after opening idbs. :returns: must be 0)r"IDP_Hooks_ev_create_merge_handlers)rrzs&&rrv"IDP_Hooks.ev_create_merge_handlers s ::4DDr#c$V^8dQhRRRRRR/#)rXrrrrrYrmr$)rZs"rr[r s"  ) I   r#c 0\P!WV4#)a5Privrange interval has been moved to a new location. Most common actions to be done by module in this case: fix indices of netnodes used by module :param old_privrange: (const range_t *) - old privrange interval :param delta: (::adiff_t) :returns: 0: Ok :returns: -1: error (and message in errbuf))rIDP_Hooks_ev_privrange_changedrs&&&rrxIDP_Hooks.ev_privrange_changed s66t  r#c ,V^8dQhRRRRRRRRRR /#) rXrrrrr/rrrYrmr$)rZs"rr[r s9 N NK Ng N N* N.1 Nr#c 2\P!WW#V4#)aperform 32-64 conversion for a netnode array element :param node: (::nodeidx_t) :param tag: (uchar) :param idx: (::nodeidx_t) :param data: (const uchar *) :returns: 0: nothing was done :returns: 1: converted successfully :returns: -1: error (and message in errbuf))rIDP_Hooks_ev_cvt64_supvalrs&&&&&rrzIDP_Hooks.ev_cvt64_supval s11$cMMr#c ,V^8dQhRRRRRRRRR R /#) rXrrrrrrKrrrYrmr$)rZs"rr[r s8 P P[ Pw Pc P P!$ Pr#c 2\P!WW#V4#)a perform 32-64 conversion for a hash value :param node: (::nodeidx_t) :param tag: (uchar) :param name: (const ::char *) :param data: (const uchar *) :returns: 0: nothing was done :returns: 1: converted successfully :returns: -1: error (and message in errbuf))rIDP_Hooks_ev_cvt64_hashvalrs&&&&&rr|IDP_Hooks.ev_cvt64_hashval s224s$OOr#c ,V^8dQhRRRRRRRRR R/#) rXr&r'stkvarrrKrmrrrYr$)rZs"rr[r s2   g      r#c 2\P!WW#V4#)a*Generate stack variable definition line Default line is varname = type ptr value, where 'type' is one of byte,word,dword,qword,tbyte :param outctx: (outctx_t *) :param stkvar: (const udm_t *) :param v: (sval_t) :param tid: (tid_t) stkvar TID :returns: 1: ok :returns: 0: not implemented)rIDP_Hooks_ev_gen_stkvar_def)rr&r rKrs&&&&&rrIDP_Hooks.ev_gen_stkvar_def s33D&  r#c$V^8dQhRRRRRR/#)rXrr,r1rrYrmr$)rZs"rr[r s' D DG D3C Ds Dr#c 0\P!WV4#)a Does the instruction calculate some address using an immediate operand? e.g. in PC such operand may be o_displ: 'lea eax, [esi+4]' :param type: (int *) pointer to the returned instruction type: * 0 the "add" instruction (the immediate operand is a relative value) * 1 the "move" instruction (the immediate operand is an absolute value) * 2 the "sub" instruction (the immediate operand is a relative value) :param insn: (const insn_t *) instruction :returns: >0 the operand number+1 :returns: 0: not implemented)rIDP_Hooks_ev_is_addr_insn)rrr1s&&&rrIDP_Hooks.ev_is_addr_insn s11$dCCr#c 0V^8dQhRRRRRRRRR R R R/#) rXrrIrrrrmrYrrrrYr$)rZs"rr[r s:   o   5 BL   r#c 2\P!WW#WE4#)aGet next address to be executed This function must return the next address to be executed. If the instruction following the current one is executed, then it must return BADADDR Usually the instructions to consider are: jumps, branches, calls, returns. This function is essential if the 'single step' is not supported in hardware. :param target: (::ea_t *), out: pointer to the answer :param ea: (::ea_t) instruction address :param tid: (int) current therad id :param getreg: (::processor_t::regval_getter_t *) function to get register values :param regvalues: (const regval_t *) register values array :returns: 0: unimplemented :returns: 1: implemented)rIDP_Hooks_ev_next_exec_insn)rrrrrYrs&&&&&&rrIDP_Hooks.ev_next_exec_insn s33D"  r#c$V^8dQhRRRRRR/#)rXrrIrrrYrmr$)rZs"rr[r s&FFFoFFr#c 0\P!WV4#)amCalculate the address of the instruction which will be executed after "step over". The kernel will put a breakpoint there. If the step over is equal to step into or we cannot calculate the address, return BADADDR. :param target: (::ea_t *) pointer to the answer :param ip: (::ea_t) instruction address :returns: 0: unimplemented :returns: 1: implemented)rIDP_Hooks_ev_calc_step_over)rrrs&&&rrIDP_Hooks.ev_calc_step_over s33D"EEr#c(V^8dQhRRRRRRRR/#) rXrrPr1rrrurYrmr$)rZs"rr[r s1 J JK J7G J J Jr#c 0\P!WW#4#)aCalculate list of addresses the instruction in 'insn' may pass control to. This callback is required for source level debugging. :param res: (eavec_t *), out: array for the results. :param insn: (const insn_t*) the instruction :param over: (bool) calculate for step over (ignore call targets) :returns: <0: incalculable (indirect jumps, for example) :returns: >=0: number of addresses of called functions in the array. They must be put at the beginning of the array (0 if over=true))rIDP_Hooks_ev_calc_next_eas)rrr1rs&&&&rrIDP_Hooks.ev_calc_next_eas s224dIIr#c$V^8dQhRRRRRR/#)rXrrIrrrYrmr$)rZs"rr[r s'II8II Ir#c 0\P!WV4#)a#Calculate the start of a macro instruction. This notification is called if IP points to the middle of an instruction :param head: (::ea_t *), out: answer, BADADDR means normal instruction :param ip: (::ea_t) instruction address :returns: 0: unimplemented :returns: 1: implemented)r IDP_Hooks_ev_get_macro_insn_head)rrrs&&&rr IDP_Hooks.ev_get_macro_insn_head s88RHHr#c$V^8dQhRRRRRR/#)rXr r,r1rrYrmr$)rZs"rr[r s'FFgF5EFFr#c 0\P!WV4#)a Get the number of the operand to be displayed in the debugger reference view (text mode). :param opnum: (int *) operand number (out, -1 means no such operand) :param insn: (const insn_t*) the instruction :returns: 0: unimplemented :returns: 1: implemented)rIDP_Hooks_ev_get_dbr_opnum)rr r1s&&&rrIDP_Hooks.ev_get_dbr_opnum s224EEr#c(V^8dQhRRRRRRRR/#) rXr1rrYrrrrYrmr$)rZs"rr[r s,  '7 ( 5? CF r#c 2\P!WVV4#)a\Check if insn will read the TF bit. :param insn: (const insn_t*) the instruction :param getreg: (::processor_t::regval_getter_t *) function to get register values :param regvalues: (const regval_t *) register values array :returns: 2: yes, will generate 'step' exception :returns: 1: yes, will store the TF bit in memory :returns: 0: no)rIDP_Hooks_ev_insn_reads_tbit)rr1rYrs&&&&rrIDP_Hooks.ev_insn_reads_tbit s44T  r#c(V^8dQhRRRRRRRR/#) rXrrrYrrrrYrmr$)rZs"rr[r# s1 M M M( M5? MCF Mr#c 0\P!WW#4#)a#Clear the TF bit after an insn like pushf stored it in memory. :param ea: (::ea_t) instruction address :param getreg: (::processor_t::regval_getter_t *) function to get register values :param regvalues: (const regval_t *) register values array :returns: 1: ok :returns: 0: failed)rIDP_Hooks_ev_clean_tbit)rrrYrs&&&&rrIDP_Hooks.ev_clean_tbit# s//&LLr#c(V^8dQhRRRRRRRR/#) rX main_regnamerrrr:rKrYrmr$)rZs"rr[r. s+O"&)r#c 0\P!WW#4#)aGet register information by its name. example: "ah" returns: * main_regname="eax" * bitrange_t = { offset==8, nbits==8 } This callback may be unimplemented if the register names are all present in processor_t::reg_names and they all have the same size :param main_regname: (const char **), out :param bitrange: (bitrange_t *), out: position and size of the value within 'main_regname' (empty bitrange == whole register) :param regname: (const char *) :returns: 1: ok :returns: -1: failed (not found) :returns: 0: unimplemented)rIDP_Hooks_ev_get_reg_info)rr rr:s&&&&rrIDP_Hooks.ev_get_reg_info. s11$  r#c ,V^8dQhRRRRRRRRR R/#) rXrr rrmrYrrrrYr$)rZs"rr[r@ s2  . s ( 5? CF r#c 2\P!WVW44#)agCalculate the call stack trace for the given thread. This callback is invoked when the process is suspended and should fill the 'trace' object with the information about the current call stack. Note that this callback is NOT invoked if the current debugger backend implements stack tracing via debugger_t::event_t::ev_update_call_stack. The debugger-specific algorithm takes priority. Implementing this callback in the processor module is useful when multiple debugging platforms follow similar patterns, and thus the same processor-specific algorithm can be used for different platforms. :param stack: (call_stack_t *) result :param tid: (int) thread id :param getreg: (::processor_t::regval_getter_t *) function to get register values :param regvalues: (const regval_t *) register values array :returns: 1: ok :returns: -1: failed :returns: 0: unimplemented)rIDP_Hooks_ev_update_call_stack)rrrrYrs&&&&&rrIDP_Hooks.ev_update_call_stack@ s66tC  r#cV^8dQhRR/#rlr$)rZs"rr[rN s55S5r#c .\P!V4#)aSetup default type libraries. (called after loading a new file into the database). The processor module may load tils, setup memory model and perform other actions required to set up the type system. This is an optional callback. :returns: void: )rIDP_Hooks_ev_setup_tilrgs&rrIDP_Hooks.ev_setup_tilN s..t44r#c V^8dQhRRRR/#)rXrmrnrYrmr$)rZs"rr[rT s>>H>>r#c .\P!W4#)zGet all possible ABI names and optional extensions for given compiler abiname/option is a string entirely consisting of letters, digits and underscore :param comp: (comp_t) - compiler ID :returns: 0: not implemented :returns: 1: ok)rIDP_Hooks_ev_get_abi_info)rrms&&rrIDP_Hooks.ev_get_abi_infoT s 11$==r#cV^8dQhRR/#rlr$)rZs"rr[r\ s888r#c .\P!V4#)z\Get maximal size of a pointer in bytes. :returns: max possible size of a pointer)rIDP_Hooks_ev_max_ptr_sizergs&rrIDP_Hooks.ev_max_ptr_size\ rvr#cV^8dQhRR/#rlr$)rZs"rr[rb sAAAr#c .\P!V4#)z]Get default enum size. Not generated anymore. inf_get_cc_size_e() is used instead )r"IDP_Hooks_ev_get_default_enum_sizergs&rr"IDP_Hooks.ev_get_default_enum_sizeb s::4@@r#c$V^8dQhRRRRRR/#)rXrCrDrErFrYrmr$)rZs"rr[rg s&AA<A[ACAr#c 0\P!WV4#)zGet register allocation convention for given calling convention :param regs: (callregs_t *), out :param cc: (::callcnv_t) :returns: 1: :returns: 0: not implemented)rIDP_Hooks_ev_get_cc_regs)rrCrEs&&&rrIDP_Hooks.ev_get_cc_regsg s00R@@r#c4V^8dQhRRRRRRRRR R R R R R/#)rXrrLrMrNrOr!rPrur1rrrQrYrmr$)rZs"rr[rp sD++%6++)+8<++,+03+r#c  4\P!WVW4WV4#)aGet SIMD-related types according to given attributes ant/or argument location :param out: (simd_info_vec_t *) :param simd_attrs: (const simd_info_t *), may be nullptr :param argloc: (const argloc_t *), may be nullptr :param create_tifs: (bool) return valid tinfo_t objects, create if neccessary :param insn: (::const insn_t *) :param op: (::const op_t *) :returns: number: of found types :returns: -1: error If insn and op are specified, return only the types that match them)rIDP_Hooks_ev_get_simd_types)rrrMrOrPr1rs&&&&&&&rrIDP_Hooks.ev_get_simd_typesp s 33Dz + +r#c V^8dQhRRRR/#rr$)rZs"rr[r sGG_GGr#c .\P!W4#)zCalculate number of purged bytes after call. :param ea: (::ea_t) address of the call instruction :returns: number of purged bytes (usually add sp, N))r$IDP_Hooks_ev_calc_cdecl_purged_bytesrps&&rr$IDP_Hooks.ev_calc_cdecl_purged_bytes s <